Defect Oriented Testing for CMOS Analog and Digital Circuits

Posted on May 27, 2010, 4:50 am

Product DescriptionDefect oriented testing is expected to play a significant role in coming generations of technology. Smaller feature sizes and larger die sizes will make ICs more sensitive to defects that can not be modeled by traditional fault modeling approaches. Furthermore, with increased level of integration, an IC may contain diverse building blocks. Such blocks include, digital logic, PLAs, volatile and non-volatile memories, and analog interfaces. For such diverse bui. . . More >>

Defect Oriented Testing for CMOS Analog and Digital Circuits