Foundation Development Board (FDB)
The Foundation Development Board rev. 1 is available now ! (6/2003).
   
Download FDB Users Manual V1.0
Download FCoPC Users Manual V1.0. The FCoPC is the fully featured and fully functional Computer System Core included with the board for free.
   
Goto FND Download Site 
   
   
 To inquire about the Foundation Development Board, send email to cmosexod@ix.netcom.com
 
 
   
 
   
Introduction

The Foundation Development Board is a low-cost FPGA development platform based on Altera’s ACEX EP1K100 FPGA. This device contains 100K user gates, and can operate at clock rates beyond 100MHz. It includes 6KBytes of internal RAM which can be configured as dual-port or single port or ROM in any configuration. The multi-volt I/O allows 2.5V, 3.3V or 5.0V to be used as VCCIO.

The Foundation Development Board contains all of the basic required peripherals on-board to allow maximum target use.

The Foundation Development Board is the only board of its kind which comes with a fully featured Computer System design for free ! See below for more info.
   

 

Block Diagram of the Foundation Development Board

Lots of Features ! 
The above illustrates the functional block diagram of the Foundation Development Board. The board has dimensions of 7.25" x 5.5" and uses 4 layer PCB. 
The package of the EP1K100 is 208-pin PQFP, and provides 147 user IOs
The FDB contains all of the essential peripherals most commonly used in medium scale FPGA development board. These includes:
 
Video DAC 
A 30MHz video allows minimum resolution of 640 x 480 pixels. This device contain a 24 bit DAC, allowing a color depth of 16Million.
 
Audio band stereo out with Stereo Volume Control
Contains all of the conditioning circuits. Allows stereo playback at CD quality (44KHz), using dual 1-Bit DAC technology. Ideal for MP3 designs !
 
RS-232 port and Level Shifter
Allows any host (PC) to communicate to the board. 
 
PS/2 keyboard port 
Any keyboard which connects to a PC can be connected in this port. 
 
Mouse port 
Any mouse which connects to a PC can be connected to this port. 
 
SDRAM - 4M x 32 
Plenty of data source built right on the board. The SDRAM is configured in 32 bit bus to handle system designs of upto 32 bits.
 
Data FLASH 512KByte 
This is shared as the FPGA configuration data and also for other permanent data source, such as microprocessor’s code. A dedicated microcontroller (Atmel AVR) handles the access to the Data Flash. The EP1K100 only consumes about 128KByte, so the rest of capacity can be used by your design.
 
SODIMM
For designs needing lots of memory, you can ues the SODIMM connector. Virtually any Notebook/Laptop SODIMM will work. Additionally, you can use the SPD (serial presence detect) EEPROM of the SODIMM if you so choose to. You wil never run out of memory space !.
 
SRAM 128K x 16
 256KBytes of SRAM organized as 128K x 16 is also available for your designs. The SRAM bus also brought out to the System Expansion Bus connector, so you can add your own memory mapped peripherals.
 
Expansion Connectors
2 expansion connectors allows your board to be infinitely expandable. The System Expansion Bus connector is handy for adding IDE drives, USB controllers, etc. The Add-On Expansion Connector allows you to add a secondaty FPGA if you run out of space on the EP1K100.
 
On board power regulators. 
The board contains 3 voltage regulators: 5V, 3.3V and 2.5V. All you need is to supply a 9Vdc to the board !
 
Multiple Clocks
The board contains not just 1, but 3 clock sources: 24MHz, 40MHz and 53.125MHz. Your design can choose any or all of these clock sources for a multi-clock domain systems.
 
 
 
Ready to Go Right Out of the Box ! 
 
The Foundation Development Board is the only board which comes with a fully functional, fully featured core for free. The board comes with Foundation CoPC (Computer on Programmable Chip). The figure below illustrates the block diagram of Foundation CoPC.
The Developer's FCoPC Package is available for those who would like to design systems based on the FCoPC. This package contains all source RTL, all C++/C source code of all supporting applications. Full manual, and support. You can modify the RTL to suit your particular need. Or you can extract and use the blocks that you only need.
Even if you do not purchase the FCoPC Developers Package, the supplied core is yours to keep, and since it is a full-featured design, you can write embedded firmware or applications for your own projects !

 

Block Diagram of the Core supplied with the FDB
 
The Foundation CoPC (FCoPC) is a fully functional 8-bit computer system. It is not a toy !! The FCoPC contains a custom 8 bit microcontroller based on a CISC CPU running at 40MHz. This is a slightly modified version of the PopCorn microprocessor available from this website. The FCoPC also features a complete SDRAM/SODIMM Controller which runs at 53.125MHz. Finally a fully featured VGA Controller with text and graphics mode is present.
 
PopCorn-V3 Microcontroller
This is based on a fully verified 8-bit CISC microprocessor IP. It provides 5 addressing modes, real-time interrupt, bus wait state and more. A table-driven assembler is supplied with it, along with TCL (Tool Control Language) Monitor. The microcontrolle runs at 40MHz. This core occupied 1/20 of the EP1K100 gate capacity. The microcontroller contains these peripherals:
 
16 bit hardware integer multiplier 
Programmable baud UART
LCD Display Controller
Mouse Controller
Audio Processor
Interrupt Controller 
SDRAM Interface controller
Programmable Timer
LED Flasher
 
 
VGA Graphics/Text Controller
This is a fully verified VGA controller. Directly compatible with standard VGA monitors. Unlike a typical VGA controller, this controller accesses the video buffer during the horizontal retrace, thus providing plenty of bandwidth for the micro to access the video buffer. The VGA controller includes a DMA engine which interfaces to the SDRAM/SODIMM Controller. The VGA Controller runs at 24MHz, and contains all multi-clock domain handling logic, making it scalable to any clock. The VGA controller supports 4 video modes:
 
Text Mode
In the text mode, it can display 80 characters by 40 rows. Each character is composed of 2-bytes: one byte for the ASCII code, and 1 byte for attirbute. The attribute ibyte is composed of 3 foreground bits, 4 background colors and 1 bit for blink mode. All character "image" is stored on a small RAM, and can be overriten to allow any custom character set. Each character is composed of 8 rows by 8 colum pixels. The default character map can be overwritten by any microprocessor during run time. The text controller uses color-map such that all text color can be modified instantly without the need for rewriting to the text buffer. On top of all this, a dedicated hardware scrolling logic allows minimum software effort to achieve smooth text scrolling.  
 
Graphics Mode 1
The Graphics Mode 1 has a resolution of 512 x 480 pixels, where each pixel is 16bit, allowing 64K color depth. Stunning graphics are capable - all on your imagination. Video scrolling is supported in hardware such that you can scroll a full graphics top to bottom of the screen of vice-versa. Remember the video games where the background scrolls from bottom to top of the screen ?
 
Graphics Mode 2
In this mode, the resolution is 340 x 240 pixels, where each pixel is 24bits, allowing a photo-realistic 16Million color depth. The pixels are "packed" in the video memory to optimize memory usage. But this is handled by the hardware, so you don't even have to think about "packing/unpacking".
 
Graphics Mode 3
In this mode, the resolution is 340 x 240 pixels, where each pixel is 16 bits, allowing a color depth of 64K. This mode consumes the least amount of memory per screen. If your design is tight on memory, go for this mode.
 
 
SDRAM/SODIMM Controller
This is a multi-clock domain memory controller which allows "clients" access to the SDRAM/SODIMM. The datapath of the controller is 32bits on the SDRAM side. On the client side, it can be 8, 16, 24 or 32 bits. The memory controller allows 2 kinds of "clients". The SDRAM controller runs at 53.125MHz. But the clients can run at any clock.
Single access clients, and Burst access clients. The clients is allowed to have any clock domain. The Single access clients are the kind which request upto 32bit of read and write access to the SDRAM. The PopCorn Microcontroller is interfaced to the SDRAM controller as Single access client at 40MHz.
The Burst Access client are the kind which accesses the SDRAM with several tens or hundreds of bytes of data. The VGA Controller and the Audio Processor are interfaced to the SDRAM as Burst Access clients at 24MHz and 40MHz respectively.
Adding more Single/Burst clients is as easy as instantiating more "client agents". This core has taken all the headche out of memory controller design.
 
 
Applications 
Because of the on-board peripherals, the Foundation Development Board has many uses:
ASIC Emulation
Single Board Computer
MP3 player
Microprocessor Development
Video Editing system
 
 

Frequently Asked Questions 
 
1. Apart from the board, what other hardware do I need for a development environment?
You will need a DC power supply, an RS-232 serial cable to connect the board to your PC, and lots of enthusiasm. Optionally you may find the ByteBlaster (or clone) cable come in handy.
 
2. The SODIMM module is not included in the kit. Can I do without? 
Absolutely. The Foundation Board already comes with 16MBytes of SDRAM. You will need the SODIMM if you intend to use it in your projects. 
 
3. Can I use a SODIMM for notebooks/laptops ?  
Yes. In fact, any laptop/notebook SODIMM will work just fine. You even have the option of using the SPD (serial presence detect) EEPROM of the SODIMM. It is all up to your creative power of your design.
 
4. How many MBytes SODIMM should I use?
 
5. Is development-software included (or downloadable) for the Altera chip? or do I need to purchase a commercial package myself? 
The development software is not included with the board, but you can download free of charge from Altera website. Alternatively, if you already have purchased a develpment software from Altera you may use that too. Just make sure you version of the software can support Acex 1K devices.
 
6. Do you intend to sell assembled boards? 
Currently, only fully assembled boards are sold. 
 
7. I am a hobbyist looking for a sort of starter-kit to play around with
Microprocessor cores. Your work seem like a good start 
The Foundation Development Board is ideal for this. It has all the common peripherals for a computer system: large SDRAM memory, generous SRAM, audio capability, video capability, mouse port, keyboard port, serial port, etc.
 
8. How does the FPGA in the board get configured ? 
There are 2 ways the FPGA is configured. You can configure it using the ByteBlaster cable from your PC. This will send the bitstream directly to the FPGA. Note that if you lose power, you need to do this again. You need to use the Altera software to download the bitsream. Alternatively, you can download the bitsteam to the on-board flash memory. Once downloaded, the FPGA will be automatically configured at power-on or when you hit one of the front switches. The software need to download the bitstream file to the on-board flash is included with the board. A DLL (Windows only) is also included such that you can use it on your own application software. You will need the serial RS-232 cable for this.
 
9. What makes this board any different from all other boards out there ? 
The Foundation Board is a low-cost "minimalistic" yet full featured and expandable board.  Also, it is the only general purpose FPGA development board (I know of), which comes with a full fledged Computer system core ready to work out of the box.
 
10. Can I extend the board with my own circuits ? 
Absolutely. There are two main expansion connectors. The System Expansion bus is along the bottom edge of the board, and connects to the SRAM and the FPGA. This is intented to be used like a typical "system" bus of a computer system. You would connect a memory-mapped peripheral in this bus. Examples are floppy disk controller, IDE controller, etc. The other expansion connector is on the back side of the board. 2 low-profile 90-pin connectors brings out just about every single pin of the FPGA. The intended use of this connector is to add another FPGA using a daugher card in a co-processor configuration.
 
11. How many clock domains are on the board ?
There are 3 clock domains in the board: 40MHz, 24MHz and 53MHz. All these clocks are connected to the FPGA and to the various devices on the board. Each of these clock has a "jumper" such that you can bypass it with another clock source.
 
12. What is included in the Developers FCoPC Kit ?
The Developers FCoPC Kit comes in a CD which contains the full Verilog source code for the entire FCoPC design. In addition, the Altera Project directory is supplied, so that the user can simple open the project from the Altera Max+PlusII. Also all of the support software tools source code are included. These are: the assembler, the character map generator, and the "fnd_tcl". The support source code runs in Microsoft Visual C++. 
 
13. What is included in the Foundation Board Package ?  
The Package includes the Board, the schematic, printed manuals, and a CD containing support executable tools which includes: "fnd_tcl", assembler, character map generator and demo scripts. 
 
14. How do I buy the Board ?
Send an email to cmosexod@ix.netcom.com with your full name, shipping address and preferred shipping method. 
 
15. how do I pay for the Board ?
You do not have to make the payment until you get the package delivered to you. At that point you can make the payment using Paypal (credit card), WesternUnion, personal checks (USA and Canada only).