Free Intellectual Properties
Currenty these are the available IPs for download. All of these IP have been simulated, debugged and tested on CPLD/FPGA platforms and working prototypes are in existance.
Free Intellectual Properties |
|
Currenty these are the available IPs for download. All of these IP have been simulated, debugged and tested on CPLD/FPGA platforms and working prototypes are in existance. |
| A word about licencing: |
| The designs in this site are the property of the stated designer. The designer has consented the free (no monetary compensation) distribution and modification of the designs for individual uses. |
| A word about feedback |
| If anyone discovers design issues, or problems encountered during compilation or any other problems which might benefit others, please report them to jlee@cmosexod.com |
| A word about Bugs |
| Every effort has been placed in making sure the cores in this site are bug free. This includes cross platform compilation (to ensure the core compiles on differenct platforms). And the cores are actually tested on CPLD/FPGA protoboards. Despite this, it is likely that bugs still looms around. Subscribe to the mailling list to be notified of bug fixes. |
| If you wish to be notified of upcoming new cores, or would like to suggest new ones, please fill out this form. This list will not be abused, and is confidential. |
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| (website started at 2/1999, hit counter placed on 2/29/2000) |
Note: A number of projects here uses Verilog "ifdefs". For users of Xilinx tools, it is recommended to run a PERL script to remove all "ifdefs". get it here
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| Reliance - 1 | 12bit DSP core and peripherals. Suitable for performing real-time signal processing, such as equalizer on stereo audio inputs. | Schematic | Viewlogic / (3 Lattice isp30256, 4 Lattice isp1016) | Joon Lee | |
| PopCorn-1 | A small, yet powerful 8 bit CISC processor. Add 4Kbyte of RAM and upto 4Kb of your own code, and you have a complete embedded processor ! | Verilog |
Altera Max+PlusII v9.21 Lattice ispEXPERT v7.2 Xilinx Foundation Base Express v2.1i |
Joon Lee |
2/99 revised Jan/01 |
| Acorn - 1 | Similar to PopCorn-1. This actually has 1 interrupt input. The only thing about this design which really is different from PopCorn-1 is the fact that I've used Altera's 10K20 FPGA, rather than a Lattice part. | VHDL (93) | Max+PlusII / 1 Flex 10K20 | Joon Lee | |
| Digital Thermometer | Add an off-shelf serial thermal sensor such as National's LM75 and you have yourself a digital thermometer | Verilog / ABEL | ispEXPERT / 1 Lattice isp3256-90 | Joon Lee | |
| Auto-Ranging Frequency counter | Self contained "single-chip" frequency counter. The design is configured to measure upto 9.999MHz, but you can go up to as much as your device technology allows. | VHDL (93) |
Max+PlusII / 1 Flex 10K20 ispEXPERT / 1 Lattice isp3256 |
Joon Lee | 4/30/99 |
| SDRAM Controller | This IP lets you use a large capacity Synchronous DRAM as if it were an SRAM. Customizable design allows easy modification for other densities. | Verilog |
Altera Max+PlusII v9.21 Lattice ispEXPERT v7.2 Xilinx Foundation Base Express v2.1i |
Joon Lee | 1/2000 |
| Altera FPGA Configurator | This IP lets you use any regular Flash/EEPROM device to configure any Altera FPGA | Verilog | Altera Max | Joon Lee | 3/2001 |
| micro-UART | Fully functional UART, ideal for embedded platform. This IP is highly configurable and extremely small. | Verilog | Altera Max | Joon Lee | 4/2001 |
| mini-UART | Fully functional UART with microprocessor bus interface. | Verilog | Altera Max | Joon Lee | 8/2001 |
| 16450 Compatible UART | Synthesizable UART 100% compatible with 16450. | Verilog |
coming soon ! (you like it sooner? write to cmosexod.ix.netcom.com) |
Joon Lee | |
| VGA-Controller | This IP contains all the text and graphics support to drive any VGA monitor in resolution of 320x200 and 80col/60row (default). If you're builing a computer/video system, you can't miss this IP. | Verilog |
coming soon ! (you like it sooner? write to cmosexod.ix.netcom.com) |
Joon Lee | |
| Projects for Post-It Boards last update 2/1/01 | |||||